root/WaveDev/trunk/WaveDev/wavedev/generate/templates/custom_ports/genStructure.py @ 4252

Revision 4252, 59.9 KB (checked in by cdietric, 6 years ago)

edits to support framework in trunk. Tested waveform from preexisting components w/component connections only. Component to device connections and component generation not tested. For earlier framework, e.g. r2923, use r4251 of OWD.
  • Property svn:executable set to *
Line 
1#! /usr/bin/env python
2
3## Copyright 2005, 2006 Virginia Polytechnic Institute and State University
4##
5## This file is part of the OSSIE Waveform Developer.
6##
7## OSSIE Waveform Developer is free software; you can redistribute it and/or modify
8## it under the terms of the GNU General Public License as published by
9## the Free Software Foundation; either version 2 of the License, or
10## (at your option) any later version.
11##
12## OSSIE Waveform Developer is distributed in the hope that it will be useful,
13## but WITHOUT ANY WARRANTY; without even the implied warranty of
14## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15## GNU General Public License for more details.
16##
17## You should have received a copy of the GNU General Public License
18## along with OSSIE Waveform Developer; if not, write to the Free Software
19## Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
20
21import sys, os, shutil
22from errorMsg import *
23
24class genAll:
25  def __init__(self,path,active_wave):
26    if path[len(path)-1] != '/':
27        path = path + '/'
28    self.path = path
29    self.active_wave = active_wave
30
31  ##############################################################################
32  ## genDirs - this function generates the directory structure for the generated
33  ##           code for the waveform; puts required files in main folder
34  ##############################################################################
35  def genDirs(self):
36    if os.path.exists(self.path) == False:
37       errorMsg(self,"Waveform already exists - exiting")
38       exit(1)
39       
40    if os.path.exists(self.path+self.active_wave.name) == False:   
41        os.mkdir(self.path + self.active_wave.name)
42     
43    #the aclocal.d stuff is commented out because the aclocal.d folder
44    #should no longer be necessary with updates to reconf and configure.ac
45    #see autofoo updates by ballister and gaedert   
46    #if os.path.exists(self.path+self.active_wave.name+'/aclocal.d') == False:   
47    #    os.mkdir(self.path + self.active_wave.name + '/aclocal.d')
48       
49    #for x in os.listdir('generate/aclocal.d/'):
50    #    if not os.path.isdir(x):
51    #        shutil.copy('generate/aclocal.d/' + x,self.path + self.active_wave.name + '/aclocal.d')
52   
53    shutil.copy('generate/reconf',self.path + self.active_wave.name)
54    #for x in os.listdir('generate/basic_xml/'):
55    #    if not os.path.isdir(x):
56    #        shutil.copy('generate/basic_xml/' + x,self.path + self.active_wave.name)
57   
58    for x in self.active_wave.components:
59        if x.generate:
60            if os.path.exists(self.path+x.name) == False:
61                os.mkdir(self.path+x.name)
62            if x.AssemblyController != True:
63                #if os.path.exists(self.path+x.name+'/aclocal.d') == False:   
64                #    os.mkdir(self.path + x.name + '/aclocal.d')
65                #for f in os.listdir('generate/aclocal.d/'):
66                #    if not os.path.isdir(f):
67                #        shutil.copy('generate/aclocal.d/' + f,self.path + x.name + '/aclocal.d')
68                shutil.copy('generate/reconf',self.path + x.name)
69                #for f in os.listdir('generate/basic_xml/'):
70                #    if not os.path.isdir(f):
71                #        shutil.copy('generate/basic_xml/' + f,self.path + x.name)
72                shutil.copy('generate/LICENSE',self.path + x.name)
73               
74  ##############################################################################
75  ## writeMakefiles - generates the make file for the waveform and then calls
76  ##                  writeCompMakefile for each seperate component
77  ##############################################################################
78  def writeMakefiles(self,DevMan_flag):
79    output = open(self.path + self.active_wave.name + '/Makefile.am','w')
80
81    Flags = ["-Wall"]
82    self.info2str(output,"AM_CXXFLAGS = ",Flags,1)
83   
84    tstr = "ossieName = " + self.active_wave.name + '\n\n'
85    output.write(tstr)
86   
87    tstr = "SUBDIRS = "
88    for c in self.active_wave.components:
89        if c.AssemblyController == True and c.generate:
90            tstr += c.name + '\n\n'
91            output.write(tstr)   
92   
93#    tstr = "waveformdir = $(prefix)/dom/waveforms/$(ossieName)\n"
94    tstr = "waveformdir = $(prefix)/dom/waveforms/\n"
95
96
97    output.write(tstr)
98
99    waveform_data = []
100    waveform_data.append(self.active_wave.name + ".sad.xml")
101    waveform_data.append(self.active_wave.name + "_DAS.xml")
102    # If there is only one node - then install device manager files as well
103    #if DevMan_flag:
104    #    waveform_data.append("DeviceManager.dcd.xml")
105    #    waveform_data.append("DeviceManager.spd.xml")
106    #    waveform_data.append("DeviceManager.scd.xml")
107    #    waveform_data.append("DeviceManager.prf.xml")
108    #waveform_data.append("DomainManager.dmd.xml")
109    #waveform_data.append("DomainManager.spd.xml")
110    #waveform_data.append("DomainManager.scd.xml")
111    #waveform_data.append("DomainManager.prf.xml")
112
113    self.info2str(output,"dist_waveform_DATA = ", waveform_data,1)
114
115    output.close()
116   
117    for c in self.active_wave.components:
118        if c.generate:
119            tmpPath = self.path + c.name
120            self.writeCompMakefile(c,tmpPath)
121           
122  ##############################################################################
123  ## writeCompMakefilee - generates the make file for an indivdual component
124  ##############################################################################
125  def writeCompMakefile(self,comp,compPath):
126    if compPath[len(compPath)-1] != '/':
127        compPath = compPath + '/'
128   
129    header = "%SK.cpp %.h : %.idl\n\t@IDL@ @IDL_FLAGS@ "
130    header += "-bcxx -Wbh=.h -Wbs=SK.cpp -Wbkeep_inc_path $<\n\n"
131    header += "%.idl :\n\tcp @SI_PATH@/standardinterfaces/$@ .\n"
132   
133    Flags = ["-Wall"]
134   
135    output = open(compPath + 'Makefile.am','w')
136    output.writelines(header + "\n")
137    self.info2str(output,"AM_CXXFLAGS = ",Flags,1)
138     
139    BuiltSources = []
140    CleanFiles = []
141    tempIntList = []
142    nodist = []
143    for x in comp.ports:
144        #if x.interface.name in tempIntList:
145        if x.interface.filename in tempIntList:
146           continue
147##        BuiltSources.append(x.interface.name+'SK.cpp')
148##        BuiltSources.append(x.interface.name+'.idl')
149##        CleanFiles.append(x.interface.name+'SK.cpp')
150##        CleanFiles.append(x.interface.name+'.idl')
151##        CleanFiles.append(x.interface.name+'.h')
152##        nodist.append(x.interface.name+'SK.cpp')
153##        tempIntList.append(x.interface.name)
154        BuiltSources.append(x.interface.filename+'SK.cpp')
155        BuiltSources.append(x.interface.filename+'.idl')
156        CleanFiles.append(x.interface.filename+'SK.cpp')
157        CleanFiles.append(x.interface.filename+'.idl')
158        CleanFiles.append(x.interface.filename+'.h')
159        nodist.append(x.interface.filename+'SK.cpp')
160        tempIntList.append(x.interface.filename)
161     
162    self.info2str(output,"BUILT_SOURCES = ",BuiltSources,wrapFlag=True)
163    self.info2str(output,"CLEANFILES = ",CleanFiles,1)
164     
165    tstr = "ossieName = " + comp.name + "\n"
166    output.write(tstr)
167    tstr = "bin_PROGRAMS = " + comp.name + "\n\n"
168    output.write(tstr)
169     
170    tstr = "xmldir = $(prefix)/xml/$(ossieName)\n"
171    output.write(tstr)
172    #tstr2 = comp.name + "Resource"
173    tstr2 = comp.name
174    xmlData = []
175    xmlData.append(tstr2 + ".prf.xml")
176    xmlData.append(tstr2 + ".scd.xml")
177    xmlData.append(tstr2 + ".spd.xml")
178    self.info2str(output,"dist_xml_DATA = ",xmlData,1,wrapFlag=True)
179     
180    tstr = comp.name + "_SOURCES = " + comp.name+".cpp " + comp.name+".h "
181    tstr += "main.cpp port_impl.cpp port_impl.h\n"
182    output.write(tstr)   
183    self.info2str(output,"nodist_"+comp.name+"_SOURCES = ",nodist,1)
184   
185    output.close()
186
187  def info2str(self, outfile, staticStr, mylist, extraLine=0,wrapFlag=False):
188    tstr = staticStr
189    mycount = 0
190    wrap = False
191    if len(mylist) > 5 or wrapFlag == True:
192        wrap = True
193
194    for x in mylist:
195      tstr = tstr + x + " "
196      mycount += 1
197      if mycount%2 == 0 and wrap and mylist.index(x) != len(mylist)-1:
198        tstr = tstr + "\\\n"
199 
200    tstr = tstr + "\n"
201    for x in range(extraLine):
202      tstr = tstr + "\n"
203
204    outfile.write(tstr)
205
206  ##############################################################################
207  ## genConfigureACFiles - calls writeConfAC for appropriate locations
208  ##############################################################################
209  def genConfigureACFiles(self,installPath="/sdr/sca"):
210    if installPath[-1] == '/':
211        installPath = installPath[0:-1] 
212     
213    tmpPath = self.path + self.active_wave.name + '/'
214    self.writeConfAC(tmpPath,self.active_wave.name,self.active_wave.ace,True,installPath)
215   
216    for c in self.active_wave.components:
217        if c.AssemblyController ==  True or not c.generate:
218            continue
219        tmpPath = self.path + c.name + '/'
220        self.writeConfAC(tmpPath,c.name,c.ace,c.timing,False,installPath)
221       
222  ##############################################################################
223  ## writeConfAC - generates configure.ac files for autoconf
224  ##############################################################################
225  def writeConfAC(self, genPath, name, aceFlag, wavFlag, installPath):
226     if genPath[len(genPath)-1] != '/':
227        genPath = genPath + '/'
228     
229     output = open(genPath + 'configure.ac','w')
230     tstr = "AC_INIT(" + name + ", 0.5.0)\nAM_INIT_AUTOMAKE\n\n"
231     output.write(tstr)
232     #tstr = 'AC_PREFIX_DEFAULT("/home/sca")\n\n'
233     tstr = 'AC_PREFIX_DEFAULT("' + installPath + '")\n\n'
234     output.write(tstr)
235     tstr = "AC_PROG_CXX\nAC_PROG_INSTALL\nAC_PROG_MAKE_SET\n\n"
236     output.write(tstr)
237     tstr = "AC_HEADER_SYS_WAIT\n\nAC_FUNC_FORK\n\n"
238     output.write(tstr)
239     #tstr = "AC_HAVE_XERCES_C\nAC_CORBA_ORB\nAC_CORBA_OMNIEVENTS\n\n"
240     #tstr = "AC_CORBA_ORB\n\n"
241     #output.write(tstr)
242
243     #begin changes made when removing aclocal.d
244     tstr = 'AC_LANG_PUSH([C++])\n\n'
245     output.write(tstr)
246
247     tstr = 'AC_CHECK_LIB([omniORB4], [main], [], [AC_MSG_ERROR([cannot find omniORBi4 library])])\n'
248     output.write(tstr)
249     tstr = 'AC_CHECK_LIB([omniDynamic4], [main], [], [AC_MSG_ERROR([cannot find omniDynamic4 library])])\n'
250     output.write(tstr)
251     tstr = 'AC_CHECK_HEADERS([omniORB4/CORBA.h], [], [AC_MSG_ERROR([cannot find omniORB4 header files])])\n\n'
252     output.write(tstr)
253
254     tstr = 'AC_LANG_POP\n\n'
255     output.write(tstr)
256
257
258     #end changes made when removing aclocal.d
259
260
261
262
263     tstr = 'export PKG_CONFIG_PATH="$PKG_CONFIG_PATH:/usr/local/lib/pkgconfig"\n'
264     output.write(tstr)
265     tstr = "PKG_CHECK_MODULES(OSSIE, ossie >= 0.0.1,,exit)\n"
266     output.write(tstr)
267     tstr = 'CXXFLAGS="$CXXFLAGS $OSSIE_CFLAGS"\nLIBS="$LIBS $OSSIE_LIBS"\n'
268     output.write(tstr)
269     tstr = 'IDL_FLAGS="$OSSIE_CFLAGS"\nAC_SUBST(IDL_FLAGS)\n\n'
270     output.write(tstr)
271     
272     if aceFlag == True:
273         tstr = 'PKG_CHECK_MODULES(ACE, ACE >= 5.4.7)\n'
274         tstr = tstr + 'AC_SUBST(ACE_CFLAGS)\nAC_SUBST(ACE_LIBS)\nLIBS="$LIBS $ACE_LIBS"\n\n'
275         output.write(tstr)
276     
277     tstr = 'PKG_CHECK_MODULES(SI, standardInterfaces >= 0.0.1,,exit)\n'
278     output.write(tstr)
279     tstr = 'SI_PATH=`pkg-config --variable=includedir standardInterfaces`\n'
280     output.write(tstr)
281     tstr = 'AC_SUBST(SI_PATH)\n\n'
282     output.write(tstr)
283     
284     tstr = "AC_CONFIG_FILES(Makefile"     
285     if wavFlag == True:
286        for x in self.active_wave.components:
287            if x.AssemblyController and x.generate:
288                tstr2 = " " + x.name + "/Makefile"
289                tstr = tstr + tstr2
290           
291     tstr = tstr + ")\n\n"
292     output.write(tstr)
293
294     tstr = "AC_OUTPUT\n"
295     output.write(tstr)
296
297     output.close()
298   
299  ##############################################################################     
300  ## This function generates the cpp and h files for each component:
301  ## component.h, component.cpp, main.cpp, port_impl.h, and port_impl.cpp
302  ##############################################################################     
303  def genCompFiles(self,comp):
304      #for x in self.active_wave.components:
305        # generate the .h files for each component
306        inputH = open('generate/templates/custom_ports/sampleComp.h','r')
307        outputH = open(self.path + comp.name + "/" + comp.name + ".h",'w')
308        self.addGPL(outputH,comp.name)
309        for line in inputH.readlines():
310          l_out = line.replace("__CLASS_DEF__",comp.name.upper()+"_IMPL_H")
311          l_out = l_out.replace("__Class_name__",comp.name+"_i")
312          if l_out.find("__PORT_DECL__") != -1:
313              self.writePortDecl(outputH,comp)
314              continue
315          if l_out.find("__ACE_INCLUDES__") != -1:
316              if comp.ace == True:
317                  l_out = '#include "ace/Task.h"\n'
318              else:
319                  continue
320          if l_out.find("__ACE_INHERIT__") != -1:
321              if comp.ace == True:
322                  l_out = l_out.replace("__ACE_INHERIT__",", public ACE_Task<ACE_MT_SYNCH>")
323              else:
324                  l_out = l_out.replace("__ACE_INHERIT__","")
325          if l_out.find("__ACE_SVC_DECL__") != -1:
326              if comp.ace == True:
327                  l_out = l_out.replace("__ACE_SVC_DECL__",'int svc(void);\n        size_t queue_size;')
328              else:
329                  continue   
330          if l_out.find("__FRIEND_DECL__") != -1:
331              l_out = l_out.replace("__FRIEND_DECL__","")
332              self.writeFriendDecl(outputH,comp)
333              continue
334                   
335          outputH.write(l_out)
336         
337        inputH.close()
338        outputH.close()
339       
340        # generate the .cpp files for each component
341        inputCPP = open('generate/templates/custom_ports/sampleComp.cpp','r')
342        outputCPP = open(self.path + comp.name + "/" + comp.name + ".cpp",'w')
343        self.addGPL(outputCPP,comp.name)
344        for line in inputCPP.readlines():
345          l_out = line.replace("__IncludeFile__",comp.name)
346          l_out = l_out.replace("__Class_name__",comp.name+"_i")
347          #l_out = l_out.replace("__NS_name__","ossie" + comp.name+"Resource")
348          if l_out.find("__PORT_INST__") != -1:
349              self.writePortInst(outputCPP,comp)
350              continue
351          if l_out.find("__GET_PORT__") != -1:
352              self.writeGetPort(outputCPP,comp)
353              continue
354          if l_out.find("__DEL_PORT__") != -1:
355              self.writeDelPort(outputCPP,comp)
356              continue
357          if l_out.find("__ACE_SVC_PORTS__") != -1:
358              self.writeACESvcPorts(outputCPP,comp)
359              continue
360          if l_out.find("__ACE_SVC_DEF__") != -1:
361              if comp.ace == True:
362                  self.writeACESvcDef(outputCPP,comp,'component',comp.timing, comp)
363              continue             
364          outputCPP.write(l_out)
365         
366        inputCPP.close()
367        outputCPP.close()
368       
369        # generate the main.cpp files for each component
370        inputMain = open('generate/templates/custom_ports/sampleMain.cpp','r')
371        outputMain = open(self.path + comp.name + "/main.cpp",'w')
372        self.addGPL(outputMain,comp.name)
373       
374        for line in inputMain.readlines():
375          l_out = line.replace("__IncludeFile__",comp.name)
376          l_out = l_out.replace("__Class_name__",comp.name+"_i")
377          l_out = l_out.replace("__CLASS_VAR__",comp.name.lower())
378          if l_out.find("__CLASS_VAR_ACE__") != -1:
379              if comp.ace == True:
380                  l_out = l_out.replace("__CLASS_VAR_ACE__",comp.name.lower())
381              else:
382                  continue         
383          if l_out.find("__NAME_SPACE__") != -1:
384              ns_list = []
385              for p in comp.ports:
386                  if p.interface.nameSpace not in ns_list:
387                      ns_list.append(p.interface.nameSpace)
388              l_out = ''
389              for tmpns in ns_list:
390                  l_out += 'using namespace ' + tmpns + ';\n'
391
392          outputMain.write(l_out)
393         
394        inputMain.close()
395        outputMain.close()
396       
397        # generate the port_impl.h file
398        inputPortImpl = open('generate/templates/custom_ports/port_impl.h','r')
399        outputPortImpl = open(self.path + comp.name + "/port_impl.h",'w')
400        self.addGPL(outputPortImpl,comp.name)
401        portSample_p = open('generate/templates/custom_ports/port_sample_p.h','r')
402        portSample_u = open('generate/templates/custom_ports/port_sample_u.h','r')
403        for line in inputPortImpl.readlines():
404            l_out = line.replace("__IncludeFile__",comp.name)
405            if l_out.find("__ACE_INCLUDES__") != -1:
406              if comp.ace == True:
407                  l_out = '#include "ace/Task.h"\n'
408              else:
409                  continue
410            if l_out.find("__TIMING_DECL_AND_INCLUDES__") != -1:
411              if comp.timing == True:
412                  l_out = 'using namespace std;\n#ifndef time_signal_message_H\n#define time_signal_message_H\ntypedef struct {\n\tchar component_name[255];\n\tchar port_name[255];\n\tchar function_name[255];\n\tchar description[255];\n\tlong time_s;\n\tlong time_us;\n\tlong number_samples;\n} time_signal_message;\n#endif\n'
413              else:
414                  l_out = ''
415            if l_out.find("__PORT_DECL__") != -1:
416              self.writePortImplDecl(outputPortImpl,portSample_p,portSample_u,comp)
417              continue         
418            outputPortImpl.write(l_out)
419           
420        inputPortImpl.close()
421        outputPortImpl.close()
422        portSample_p.close()
423        portSample_u.close()
424       
425        # generate the port_impl.cpp file
426        inputPortImpl = open('generate/templates/custom_ports/port_impl.cpp','r')
427        outputPortImpl = open(self.path + comp.name + "/port_impl.cpp",'w')
428        self.addGPL(outputPortImpl,comp.name)
429        portSample_p = open('generate/templates/custom_ports/port_sample_p.cpp','r')
430        portSample_u = open('generate/templates/custom_ports/port_sample_u.cpp','r')
431        for line in inputPortImpl.readlines():
432            l_out = line
433            if l_out.find("__PORT_DEF__") != -1:
434              self.writePortImplDef(outputPortImpl,portSample_p,portSample_u,comp)
435              continue
436            outputPortImpl.write(l_out)
437           
438        inputPortImpl.close()
439        outputPortImpl.close()
440        portSample_p.close()
441        portSample_u.close()
442       
443    # Copy some required files into the main directory
444    #  os.system('cp generate/basic_xml/* ' + self.path)
445    #  os.system('cp generate/wavLoader.py ' + self.path)
446
447  def writePortImplDecl(self, output,portSample_p,portSample_u,c):
448    """ This function writes port implementation declarations for the port_impl.h file"""
449    intList = []
450    for x in c.ports:
451        if x.interface.filename in intList:
452            continue
453        ts = '#include "' + x.interface.filename + '.h"\n'
454        intList.append(x.interface.filename)
455        output.write(ts)
456    ts = '\n';output.write(ts);
457    intList = []
458    for x in c.ports:
459        found_match = False
460        for int_tup in intList:
461            if x.interface.name == int_tup[0]:
462                if x.type == int_tup[1]:
463                    found_match = True
464                    break
465        if found_match:
466            continue
467        #if x.interface.name in intList:
468        #    continue
469        if x.type == "Uses":
470            portSample = portSample_u
471        else:
472            portSample = portSample_p
473        portSample.seek(0)
474        intList.append((x.interface.name, x.type))
475        for line in portSample.readlines():
476            l_out = line.replace("__IN_PORT__",x.p_cname)
477            l_out = l_out.replace("__INT_TYPE__",x.interface.name)
478            l_out = l_out.replace("__NAME_SPACE__",x.interface.nameSpace)
479            l_out = l_out.replace("__OUT_PORT__",x.u_cname)
480            l_out = l_out.replace("__IN_CLASS__",x.p_cname)
481            l_out = l_out.replace("__OUT_CLASS__",x.u_cname)
482            if l_out.find("__OPERATION__") != -1:
483              self.writeOperation(output,x.interface,port=c)
484              continue
485            if l_out.find("__ACE_INHERIT__") != -1:
486              if c.ace == True:
487                  l_out = l_out.replace("__ACE_INHERIT__",", public ACE_Task<ACE_MT_SYNCH>")
488              else:
489                  l_out = l_out.replace("__ACE_INHERIT__","")
490            if l_out.find("__TIMING_BUFFER_LENGTH__") != -1:
491              if (c.timing==True):
492                if (x.interface.name=='timingStatus'):
493                  l_out = l_out.replace("__TIMING_BUFFER_LENGTH__",'#define NUMBER_TIMING_MESSAGE_BUFFER        100')
494                else:
495                  l_out = l_out.replace("__TIMING_BUFFER_LENGTH__", '');
496              else:
497                l_out = l_out.replace("__TIMING_BUFFER_LENGTH__", '');
498            if l_out.find("__TIMING_DECL__") != -1:
499              if (c.timing==True):
500                if (x.interface.name=='timingStatus'):
501                  l_out = l_out.replace("__TIMING_DECL__",'void send_timing_message(string component_name, string port_name, string function_name, string description, long number_samples);')
502                else:
503                  l_out = l_out.replace("__TIMING_DECL__",'')
504              else:
505                l_out = l_out.replace("__TIMING_DECL__",'')
506            if l_out.find("__TIMING_VAR__") != -1:
507              if (c.timing==True):
508                if (x.interface.name=='timingStatus'):
509                  l_out = l_out.replace("__TIMING_VAR__",'time_signal_message message_buffer[NUMBER_TIMING_MESSAGE_BUFFER];\n    int message_buffer_write_idx;\n    omni_mutex writing_to_timing_buffer;\n    omni_semaphore *data_is_ready;')
510                else:
511                  l_out = l_out.replace("__TIMING_VAR__",'')
512              else:
513                l_out = l_out.replace("__TIMING_VAR__",'')
514            if l_out.find("__ACE_SVC_DECL__") != -1:
515              if (c.ace == True):
516                  l_out = l_out.replace("__ACE_SVC_DECL__",'int svc(void);')
517              else:
518                  l_out = l_out.replace("__ACE_SVC_DECL__",'')
519            if l_out.find("__COMP_ARG__") != -1:
520                if c.type == "resource":
521                    l_out = l_out.replace("__COMP_ARG__",c.name+"_i *_"+c.name.lower())
522                else:
523                    l_out = l_out.replace("__COMP_ARG__","")
524            if l_out.find("__COMP_REF_DECL__") != -1:
525                if c.type == "resource":
526                    l_out = l_out.replace("__COMP_REF_DECL__",c.name+"_i *"+c.name.lower()+";")
527                else:
528                    l_out = l_out.replace("__COMP_REF_DECL__","")
529               
530            output.write(l_out)
531
532  def writePortImplDef(self,output,portSample_p,portSample_u,c):
533    """ This function writes port implementation definitions for the port_impl.cpp file"""
534    intList = []   
535    for x in c.ports:
536        found_match = False
537        for int_tup in intList:
538            if x.interface.name == int_tup[0]:
539                if x.type == int_tup[1]:
540                    found_match = True
541                    break
542        if found_match:
543            continue
544        #if x.interface.name in intList:
545        #    continue
546        if x.type == "Uses":
547            portSample = portSample_u
548        else:
549            portSample = portSample_p
550        portSample.seek(0)
551        intList.append((x.interface.name, x.name))
552        for line in portSample.readlines():
553            l_out = line.replace("__IN_PORT__",x.p_cname)
554            l_out = l_out.replace("__INT_TYPE__",x.interface.name)
555            l_out = l_out.replace("__NAME_SPACE__",x.interface.nameSpace)
556            l_out = l_out.replace("__OUT_PORT__",x.u_cname)
557            if l_out.find("__OPERATION__") != -1:
558              l_out = l_out.replace("__OPERATION__",'')
559              l_out = l_out.replace("\n",'')
560              self.writeOperation(output,x.interface,prefix=l_out,cppFlag=True,in_name=c.name.lower(),using_ace=c.ace,comp=c,port=x)
561              continue
562            if l_out.find("__ACE_SVC_DEF__") != -1:
563              if c.ace == True:
564                  self.writeACESvcDef(output,x,'port',c.timing, c)
565              continue
566            if l_out.find("__TIMING_MESSAGE_DEF__") != -1:
567              if (c.timing == True) & (x.interface.name=='timingStatus'):
568                  self.writeTimingMessageDef(output,x,'port')
569              continue
570            if l_out.find("__COMP_ARG__") != -1:
571                if c.type == "resource":
572                    l_out = l_out.replace("__COMP_ARG__",c.name+"_i *_"+c.name.lower())
573                else:
574                    l_out = l_out.replace("__COMP_ARG__","")
575            if l_out.find("__COMP_REF_DEF__") != -1:
576                if c.type == "resource":
577                    l_out = l_out.replace("__COMP_REF_DEF__",c.name.lower()+" = _"+c.name.lower()+";")
578                else:
579                    l_out = l_out.replace("__COMP_REF_DEF__","")
580            if l_out.find("__INIT_VARS_DEF__") != -1:
581                if (c.type == "resource") & (x.interface.name=='timingStatus'):
582                    l_out = l_out.replace("__INIT_VARS_DEF__","message_buffer_write_idx = 0;\n    data_is_ready = new omni_semaphore(0);")
583                else:
584                    l_out = l_out.replace("__INIT_VARS_DEF__","")
585            output.write(l_out)
586
587  def writePortDecl(self, output,c):
588    """ This function writes the corba declarations of the ports to the component header file"""
589    inCount = 0; outCount=0;
590    for x in c.ports:
591        if x.type == "Provides":
592            ts = " "*8 + x.cname + " " + "*inPort" + str(inCount) + "_servant;\n"
593            output.write(ts)
594            inCount += 1
595    ts = "\n"; output.write(ts)
596    for x in c.ports:
597        if x.type == "Uses":
598            ts = " "*8 + x.cname + " " + "*outPort" + str(outCount) + "_servant;\n"
599            output.write(ts)
600            outCount += 1
601    ts = "\n"; output.write(ts)
602    inCount = 0; outCount=0;
603    for x in c.ports:
604        if x.type == "Provides":
605            ts = " "*8 + x.interface.nameSpace + "::" + x.interface.name + "_var " + "inPort" + str(inCount) + "_var;\n"
606            output.write(ts)
607            inCount += 1
608    ts = "\n"; output.write(ts)
609    for x in c.ports:
610        if x.type == "Uses":
611            ts = " "*8 + "CF::Port_var " + "outPort" + str(outCount) + "_var;\n"
612            ts += " "*8 + "bool outPort" + str(outCount) + "_active;\n"
613            ts += " "*8 + "size_t outPort" + str(outCount) + "_queue_size;\n"
614            output.write(ts)
615            outCount += 1
616    ts = " "*8 + "bool component_alive;\n\n" + " "*8 + "string naming_service_name;\n"; output.write(ts)
617   
618  def writePortInst(self,output,c):
619    """ This function writes the port instantiations to the component cpp file"""
620    inCount = 0; outCount=0;
621    for x in c.ports:
622        if x.type == "Provides":
623            ts = " "*4 + "inPort" + str(inCount) + "_servant" + " = new " + x.cname + "(this);\n"
624            output.write(ts)
625            ts = " "*4 + "inPort" + str(inCount) + "_var = inPort" + str(inCount)+ "_servant->_this();\n"
626            output.write(ts)
627            inCount += 1
628    ts = "\n"; output.write(ts)
629    for x in c.ports:
630        if x.type == "Uses":
631            ts = " "*4 + "outPort" + str(outCount) + "_servant" + " = new " + x.cname + "(this);\n"
632            output.write(ts)
633            ts = " "*4 + "outPort" + str(outCount) + "_var = outPort" + str(outCount)+ "_servant->_this();\n"
634            ts += " "*4 + "outPort" + str(outCount) + "_active = false;\n"
635            ts += " "*4 + "outPort" + str(outCount) + "_queue_size = DEFAULT_QUEUE_BLOCK_SIZE;\n"
636            output.write(ts)
637            outCount += 1
638    ts = "\n"; output.write(ts)
639    ts = " "*4 + "queue_size = DEFAULT_QUEUE_BLOCK_SIZE;\n\n" + " "*4 + "component_alive = true;\n\n" + " "*4 + "naming_service_name = label;\n"; output.write(ts)
640   
641  def writeGetPort(self,output,c):
642    """ This function writes the getPort functionality to the component cpp file"""
643    inCount = 0; outCount=0;
644    flag = True
645    for x in c.ports:
646        if x.type == "Provides":
647            if flag:
648                ts = " "*4 + 'if (strcmp(_id,"' + x.name + '") == 0) {\n'
649            else:
650                ts = " "*4 + 'else if (strcmp(_id,"' + x.name + '") == 0) {\n'
651            output.write(ts)
652#            ts = " "*8 + "return inPort" + str(inCount) + "_var;\n"
653            ts = " "*8 + "return " + x.interface.nameSpace + "::" + x.interface.name
654            ts += "::_duplicate(inPort" + str(inCount) + "_var);\n"
655            ts += " "*4 + "}\n"
656            output.write(ts)
657            inCount += 1
658    ts = "\n"; output.write(ts)
659    for x in c.ports:
660        if x.type == "Uses":
661            if flag:
662                ts = " "*4 + 'if (strcmp(_id,"' + x.name + '") == 0) {\n'
663            else:
664                ts = " "*4 + 'else if (strcmp(_id,"' + x.name + '") == 0) {\n'
665            output.write(ts)
666            ts = " "*8 + "outPort" + str(outCount) + "_active = true;\n"
667            ts += " "*8 + "return CF::Port::_duplicate(outPort" + str(outCount) + "_var);\n"
668            ts += " "*4 + "}\n"
669            output.write(ts)
670            outCount += 1
671    ts = "\n"; output.write(ts)
672    ts = " "*4 + 'return NULL;\n'; output.write(ts)
673   
674  def writeDelPort(self,output,c):
675    """ This function writes the destructor functionality (for ports) to the component cpp file"""
676    inCount = 0; outCount=0;
677    flag = True
678    for x in c.ports:
679        if x.type == "Provides":
680            ts = " "*4 + "delete inPort" + str(inCount) + "_servant;\n"
681            output.write(ts)
682            inCount += 1
683    ts = "\n"; output.write(ts)
684    for x in c.ports:
685        if x.type == "Uses":
686            ts = " "*4 + "delete outPort" + str(outCount) + "_servant;\n"
687            output.write(ts)
688            outCount += 1
689    ts = "\n"; output.write(ts)
690   
691##  def writeACESvcPorts(self,output,c):
692##    """ This function writes the svc port functionality to the component cpp file"""
693##    outCount=0;
694##    for x in c.ports:
695##        if x.type == "Uses":
696##            ts = " "*4 + "outPort" + str(outCount) + "_servant->activate();\n"
697##            output.write(ts)
698##            outCount += 1
699##    ts = "\n"; output.write(ts) 
700   
701  def writeACESvcDef(self, output,c,type,timing_flag, comp=''):
702    """ This function writes the implementation of the svn() function for a given component"""
703    if type == 'component':
704        ts = 'int ' + c.name + '_i::svc(void)\n{\n'
705        output.write(ts)
706        ts = " "*4 + '/* Start outgoing port threads */\n'
707        output.write(ts)
708        outCount=0;
709        for x in c.ports:
710            if x.type == "Uses":
711                ts = " "*4 + "outPort" + str(outCount) + "_servant->activate();\n"; output.write(ts)
712                outCount += 1
713        ts = "\n"; output.write(ts)
714        ts = " "*4 + 'std::vector<double> d1_data_double;\n'; output.write(ts)
715        ts = " "*4 + 'std::vector<float> d1_data_float;\n'; output.write(ts)
716        ts = " "*4 + 'std::vector<short> d1_data_short;\n'; output.write(ts)
717        ts = " "*4 + 'std::vector<float> d2_data_double;\n'; output.write(ts)
718        ts = " "*4 + 'std::vector<double> d2_data_float;\n'; output.write(ts)
719        ts = " "*4 + 'std::vector<short> d2_data_short;\n'; output.write(ts)
720        ts = " "*4 + 'ACE_Message_Block *mb;\n'; output.write(ts)
721        ts = " "*4 + '/* Main function loop */\n'; output.write(ts)
722        ts = " "*4 + 'while(component_alive)\n' + " "*4 + '{\n'; output.write(ts)
723        ts = " "*8 + "ACE_Time_Value getq_time_out = ACE_OS::gettimeofday();\n"; output.write(ts)
724        ts = " "*8 + "getq_time_out += 1;\n"; output.write(ts)
725        ts = " "*8 + "if(getq(mb, &getq_time_out) >= 0) {\n"; output.write(ts)
726        ts = " "*12 + "unsigned int buffer_size=mb->length();\n"; output.write(ts)
727        ts = " "*12 + "unsigned short data_type;\n"; output.write(ts)
728        ts = " "*12 + "ACE_OS::memmove( (char*)&data_type, mb->rd_ptr(), sizeof(unsigned short));\n"; output.write(ts)
729        ts = " "*12 + "mb->rd_ptr(sizeof(unsigned short));\n"; output.write(ts)
730        ts = " "*12 + "buffer_size=buffer_size - sizeof(unsigned short);\n"; output.write(ts)
731        ts = " "*12 + "unsigned int packet_size = 0;\n"; output.write(ts)
732        ts = " "*12 + "std::vector<double> data_I;\n"; output.write(ts)
733        ts = " "*12 + "std::vector<double> data_Q;\n"; output.write(ts)
734        ts = " "*12 + "// I've arbitrarily decided to use doubles as my working type inside the component\n"; output.write(ts)
735        ts = " "*12 + "//       the working type is implementation-specific\n"; output.write(ts)
736        ts = " "*12 + "switch(data_type) {\n"; output.write(ts)
737        ts = " "*16 + "case 1:\n"; output.write(ts)
738        ts = " "*20 + "// this is for complex double\n"; output.write(ts)
739        ts = " "*20 + "packet_size=buffer_size/(sizeof(double)*2);\n"; output.write(ts)
740        ts = " "*20 + "{\n"; output.write(ts)
741        ts = " "*24 + "std::vector <double> vals(packet_size*2);\n"; output.write(ts)
742        ts = " "*24 + "ACE_OS::memmove( (char*)&vals[0], mb->rd_ptr(), buffer_size);\n"; output.write(ts)
743        ts = " "*24 + "data_I.resize(packet_size);\n"; output.write(ts)
744        ts = " "*24 + "data_Q.resize(packet_size);\n"; output.write(ts)
745        ts = " "*24 + "for (unsigned int i = 0; i<packet_size; i++) {\n"; output.write(ts)
746        ts = " "*28 + "data_I[i] = vals[i];\n"; output.write(ts)
747        ts = " "*28 + "data_Q[i] = vals[i+packet_size];\n"; output.write(ts)
748        ts = " "*24 + "}\n"; output.write(ts)
749        ts = " "*20 + "}\n"; output.write(ts)
750        ts = " "*20 + "break;\n"; output.write(ts)
751        ts = " "*16 + "case 2:\n"; output.write(ts)
752        ts = " "*20 + "// this is for complex float\n"; output.write(ts)
753        ts = " "*20 + "packet_size=buffer_size/(sizeof(float)*2);\n"; output.write(ts)
754        ts = " "*20 + "{\n"; output.write(ts)
755        ts = " "*24 + "std::vector <float> vals(packet_size*2);\n"; output.write(ts)
756        ts = " "*24 + "ACE_OS::memmove( (char*)&vals[0], mb->rd_ptr(), buffer_size);\n"; output.write(ts)
757        ts = " "*24 + "data_I.resize(packet_size);\n"; output.write(ts)
758        ts = " "*24 + "data_Q.resize(packet_size);\n"; output.write(ts)
759        ts = " "*24 + "for (unsigned int i = 0; i<packet_size; i++) {\n"; output.write(ts)
760        ts = " "*28 + "data_I[i] = vals[i];\n"; output.write(ts)
761        ts = " "*28 + "data_Q[i] = vals[i+packet_size];\n"; output.write(ts)
762        ts = " "*24 + "}\n"; output.write(ts)
763        ts = " "*20 + "}\n"; output.write(ts)
764        ts = " "*20 + "break;\n"; output.write(ts)
765        ts = " "*16 + "case 3:\n"; output.write(ts)
766        ts = " "*20 + "// this is for complex short\n"; output.write(ts)
767        ts = " "*20 + "packet_size=buffer_size/(sizeof(short)*2);\n"; output.write(ts)
768        ts = " "*20 + "{\n"; output.write(ts)
769        ts = " "*24 + "std::vector <short> vals(packet_size*2);\n"; output.write(ts)
770        ts = " "*24 + "ACE_OS::memmove( (char*)&vals[0], mb->rd_ptr(), buffer_size);\n"; output.write(ts)
771        ts = " "*24 + "data_I.resize(packet_size);\n"; output.write(ts)
772        ts = " "*24 + "data_Q.resize(packet_size);\n"; output.write(ts)
773        ts = " "*24 + "for (unsigned int i = 0; i<packet_size; i++) {\n"; output.write(ts)
774        ts = " "*28 + "data_I[i] = vals[i];\n"; output.write(ts)
775        ts = " "*28 + "data_Q[i] = vals[i+packet_size];\n"; output.write(ts)
776        ts = " "*24 + "}\n"; output.write(ts)
777        ts = " "*20 + "}\n"; output.write(ts)
778        ts = " "*20 + "break;\n"; output.write(ts)
779        ts = " "*16 + "case 4:\n"; output.write(ts)
780        ts = " "*20 + "// this is for real double\n"; output.write(ts)
781        ts = " "*20 + "packet_size=buffer_size/(sizeof(double));\n"; output.write(ts)
782        ts = " "*20 + "{\n"; output.write(ts)
783        ts = " "*24 + "std::vector <double> vals(packet_size);\n"; output.write(ts)
784        ts = " "*24 + "ACE_OS::memmove( (char*)&vals[0], mb->rd_ptr(), buffer_size);\n"; output.write(ts)
785        ts = " "*24 + "data_I.resize(packet_size);\n"; output.write(ts)
786        ts = " "*24 + "data_Q.resize(packet_size);\n"; output.write(ts)
787        ts = " "*24 + "for (unsigned int i = 0; i<packet_size; i++) {\n"; output.write(ts)
788        ts = " "*28 + "data_I[i] = vals[i];\n"; output.write(ts)
789        ts = " "*28 + "data_Q[i] = 0;\n"; output.write(ts)
790        ts = " "*24 + "}\n"; output.write(ts)
791        ts = " "*20 + "}\n"; output.write(ts)
792        ts = " "*20 + "break;\n"; output.write(ts)
793        ts = " "*16 + "case 5:\n"; output.write(ts)
794        ts = " "*20 + "// this is for real float\n"; output.write(ts)
795        ts = " "*20 + "packet_size=buffer_size/(sizeof(float));\n"; output.write(ts)
796        ts = " "*20 + "{\n"; output.write(ts)
797        ts = " "*24 + "std::vector <float> vals(packet_size);\n"; output.write(ts)
798        ts = " "*24 + "ACE_OS::memmove( (char*)&vals[0], mb->rd_ptr(), buffer_size);\n"; output.write(ts)
799        ts = " "*24 + "data_I.resize(packet_size);\n"; output.write(ts)
800        ts = " "*24 + "data_Q.resize(packet_size);\n"; output.write(ts)
801        ts = " "*24 + "for (unsigned int i = 0; i<packet_size; i++) {\n"; output.write(ts)
802        ts = " "*28 + "data_I[i] = vals[i];\n"; output.write(ts)
803        ts = " "*28 + "data_Q[i] = 0;\n"; output.write(ts)
804        ts = " "*24 + "}\n"; output.write(ts)
805        ts = " "*20 + "}\n"; output.write(ts)
806        ts = " "*20 + "break;\n"; output.write(ts)
807        ts = " "*16 + "case 6:\n"; output.write(ts)
808        ts = " "*20 + "// this is for real short\n"; output.write(ts)
809        ts = " "*20 + "packet_size=buffer_size/(sizeof(short));\n"; output.write(ts)
810        ts = " "*20 + "{\n"; output.write(ts)
811        ts = " "*24 + "std::vector <short> vals(packet_size);\n"; output.write(ts)
812        ts = " "*24 + "ACE_OS::memmove( (char*)&vals[0], mb->rd_ptr(), buffer_size);\n"; output.write(ts)
813        ts = " "*24 + "data_I.resize(packet_size);\n"; output.write(ts)
814        ts = " "*24 + "data_Q.resize(packet_size);\n"; output.write(ts)
815        ts = " "*24 + "for (unsigned int i = 0; i<packet_size; i++) {\n"; output.write(ts)
816        ts = " "*28 + "data_I[i] = vals[i];\n"; output.write(ts)
817        ts = " "*28 + "data_Q[i] = 0;\n"; output.write(ts)
818        ts = " "*24 + "}\n"; output.write(ts)
819        ts = " "*20 + "}\n"; output.write(ts)
820        ts = " "*20 + "break;\n"; output.write(ts)
821        ts = " "*12 + "}\n"; output.write(ts)
822        #ts = " "*8 + "}\n"; output.write(ts)
823        ts = " "*12 + "mb->release();\n"; output.write(ts)
824        ts = " "*12 + "/*******************************************************************\n"; output.write(ts)
825        ts = " "*24 + "Insert functional code here\n"; output.write(ts)
826        ts = " "*12 + "*******************************************************************/\n\n"; output.write(ts)
827        ts = " "*12 + "/******************************************************************/\n\n"; output.write(ts)
828        ts = " "*12 + "// Prepare data for output\n"; output.write(ts)
829        ts = " "*12 + "d1_data_double.resize(packet_size);\n"; output.write(ts)
830        ts = " "*12 + "d1_data_float.resize(packet_size);\n"; output.write(ts)
831        ts = " "*12 + "d1_data_short.resize(packet_size);\n"; output.write(ts)
832        ts = " "*12 + "d2_data_double.resize(packet_size*2);\n"; output.write(ts)
833        ts = " "*12 + "d2_data_float.resize(packet_size*2);\n"; output.write(ts)
834        ts = " "*12 + "d2_data_short.resize(packet_size*2);\n\n"; output.write(ts)
835        ts = " "*12 + "for (unsigned int i=0; i<packet_size; i++) {\n"; output.write(ts)
836        ts = " "*16 + "d1_data_double[i] = data_I[i];\n"; output.write(ts)
837        ts = " "*16 + "d1_data_float[i] = data_I[i];\n"; output.write(ts)
838        ts = " "*16 + "d1_data_short[i] = (short)data_I[i];\n"; output.write(ts)
839        ts = " "*16 + "d2_data_double[i] = data_I[i];\n"; output.write(ts)
840        ts = " "*16 + "d2_data_double[i+packet_size] = data_Q[i];\n"; output.write(ts)
841        ts = " "*16 + "d2_data_float[i] = data_I[i];\n"; output.write(ts)
842        ts = " "*16 + "d2_data_float[i+packet_size] = data_Q[i];\n"; output.write(ts)
843        ts = " "*16 + "d2_data_short[i] = (short)data_I[i];\n"; output.write(ts)
844        ts = " "*16 + "d2_data_short[i+packet_size] = (short)data_Q[i];\n"; output.write(ts)
845        ts = " "*12 + "}\n"; output.write(ts)
846        outCount=0;
847        for x in c.ports:
848            if (x.type == "Uses") & ((x.interface.name == 'realDouble')|(x.interface.name == 'realFloat')|(x.interface.name == 'realShort')|(x.interface.name == 'complexDouble')|(x.interface.name == 'complexFloat')|(x.interface.name == 'complexShort')):
849                ts = " "*12 + "if (outPort" + str(outCount) + "_active) {\n"; output.write(ts)
850                if x.interface.name == 'realDouble':
851                        DATA_TYPE_BEING_USED = 'double'
852                        VECTOR_COUNT = '1'
853                        VECTOR_NAME = 'd1_data_double'
854                if x.interface.name == 'realFloat':
855                        DATA_TYPE_BEING_USED = 'float'
856                        VECTOR_COUNT = '1'
857                        VECTOR_NAME = 'd1_data_float'
858                if x.interface.name == 'realShort':
859                        DATA_TYPE_BEING_USED = 'short'
860                        VECTOR_COUNT = '1'
861                        VECTOR_NAME = 'd1_data_short'
862                if x.interface.name == 'complexDouble':
863                        DATA_TYPE_BEING_USED = 'double'
864                        VECTOR_COUNT = '2'
865                        VECTOR_NAME = 'd2_data_double'
866                if x.interface.name == 'complexFloat':
867                        DATA_TYPE_BEING_USED = 'float'
868                        VECTOR_COUNT = '2'
869                        VECTOR_NAME = 'd2_data_float'
870                if x.interface.name == 'complexShort':
871                        DATA_TYPE_BEING_USED = 'short'
872                        VECTOR_COUNT = '2'
873                        VECTOR_NAME = 'd2_data_short'
874                ts = " "*16 + "ACE_Message_Block *message = new ACE_Message_Block (packet_size*" + VECTOR_COUNT + "*sizeof(" + DATA_TYPE_BEING_USED + "));\n"; output.write(ts)
875                ts = " "*16 + "message->copy((const char*)&" + VECTOR_NAME + "[0], packet_size*" + VECTOR_COUNT + "*sizeof(" + DATA_TYPE_BEING_USED + "));\n"; output.write(ts)
876                ts = " "*16 + "size_t message_length = packet_size*" + VECTOR_COUNT + "*sizeof(" + DATA_TYPE_BEING_USED + ");\n"; output.write(ts)
877                ts = " "*16 + "size_t available_space = outPort" + str(outCount) + "_servant->msg_queue()->message_bytes();\n"; output.write(ts)
878                ts = " "*16 + "if (available_space<=(outPort" + str(outCount) + "_queue_size+message_length)) {\n"; output.write(ts)
879                ts = " "*20 + "outPort" + str(outCount) + "_queue_size+=QUEUE_BLOCK_SIZE;\n"; output.write(ts)
880                ts = " "*20 + "outPort" + str(outCount) + "_servant->water_marks (ACE_IO_Cntl_Msg::SET_HWM, outPort" + str(outCount) + "_queue_size);\n"; output.write(ts)
881                ts = " "*16 + "}\n"; output.write(ts)
882                ts = " "*16 + "if (outPort" + str(outCount) + "_servant->putq(message) == -1) {\n"; output.write(ts)
883                ts = " "*20 + "//  this is where a message for issues with the putq would appear\n"; output.write(ts)
884                ts = " "*16 + "}\n"; output.write(ts)
885                ts = " "*12 + "}\n"; output.write(ts)
886                outCount += 1
887        ts = " "*8 + "}\n"; output.write(ts)
888        ts = " "*8 + "/* Polling rate, slow CPU spinning */\n"; output.write(ts)
889        ts = " "*8 + "//ACE_OS::sleep (ACE_Time_Value (1));\n"; output.write(ts)
890        ts = " "*4 + '}\n\n' + " "*4 + 'return 0;\n}\n'; output.write(ts)
891       
892    if type == 'port':
893        #ts = 'int ' + c.u_cname + '::svc(void)\n{\n'; output.write(ts)
894        #ts = " "*4 + 'ACE_Message_Block *mb;\n\n'; output.write(ts)
895        #ts = " "*4 + 'while(1)\n' + " "*4 + '{\n' + " "*8 + 'if (getq(mb) == -1)\n'
896        #output.write(ts)
897        #ts = " "*8 + '{\n' + " "*12 + 'ACE_ERROR_RETURN ((LM_ERROR, ' + r'"%p\n",'
898        #ts = ts + ' "getq"), -1);\n'
899        #output.write(ts)
900        #ts = " "*8 + '}\n\n' + " "*8 + '/* _complexShort->pushPacket(); */\n\n'
901        #output.write(ts)
902        #ts = " "*8 + '/* Release message block */\n' + " "*8 + 'mb->release();\n'
903        #output.write(ts)
904        #ts = " "*4 + '}\n' + " "*4 + 'return 0;\n}\n'
905        #output.write(ts)
906                # the following stuff is a work in progress
907                #       it needs to be reconciled with the contents of the actual port
908                #       This will be interesting for control ports instead of data ports
909                #       in the case of control ports, it will likely need a slightly different structure
910        #print c.interface.name
911        ts = 'int ' + c.u_cname + '::svc(void)\n{\n'; output.write(ts)
912        if ((c.interface.name == 'realDouble')|(c.interface.name == 'realFloat')|(c.interface.name == 'realShort')|(c.interface.name == 'complexDouble')|(c.interface.name == 'complexFloat')|(c.interface.name == 'complexShort')):
913                ts = " "*4 + 'ACE_Message_Block *mb;\n'; output.write(ts)
914                if c.interface.name == 'realDouble':
915                        DATA_TYPE_BEING_USED = 'double'
916                        DATA_TYPE_USED = 'Double'
917                        ARGUMENT_LIST_FOR_PUSH = ' I'
918                if c.interface.name == 'realFloat':
919                        DATA_TYPE_BEING_USED = 'float'
920                        DATA_TYPE_USED = 'Float'
921                        ARGUMENT_LIST_FOR_PUSH = ' I'
922                if c.interface.name == 'realShort':
923                        DATA_TYPE_BEING_USED = 'short'
924                        DATA_TYPE_USED = 'Short'
925                        ARGUMENT_LIST_FOR_PUSH = ' I'
926                if c.interface.name == 'complexDouble':
927                        DATA_TYPE_BEING_USED = 'double'
928                        DATA_TYPE_USED = 'Double'
929                        ARGUMENT_LIST_FOR_PUSH = ' I, Q'
930                if c.interface.name == 'complexFloat':
931                        DATA_TYPE_BEING_USED = 'float'
932                        DATA_TYPE_USED = 'Float'
933                        ARGUMENT_LIST_FOR_PUSH = ' I, Q'
934                if c.interface.name == 'complexShort':
935                        DATA_TYPE_BEING_USED = 'short'
936                        DATA_TYPE_USED = 'Short'
937                        ARGUMENT_LIST_FOR_PUSH = ' I, Q'
938                ts = " "*4 + 'vector < ' + DATA_TYPE_BEING_USED + ' > vals;\n'; output.write(ts)
939                ts = " "*4 + 'PortTypes::' + DATA_TYPE_USED + 'Sequence ' + ARGUMENT_LIST_FOR_PUSH +';\n\n'; output.write(ts)
940                ts = " "*4 + 'while(1)\n' + " "*8 + '{\n'; output.write(ts)
941                ts = " "*8 + 'ACE_Time_Value getq_time_out = ACE_OS::gettimeofday();\n'; output.write(ts)
942                ts = " "*8 + 'getq_time_out += 1;\n'; output.write(ts)
943                ts = " "*8 + 'if(getq(mb, &getq_time_out) >= 0) {\n'; output.write(ts)
944                portCount = 0
945                if c.interface.name == 'realDouble':
946                        NUMBER_OF_VECTORS = '1'
947                if c.interface.name == 'realFloat':
948                        NUMBER_OF_VECTORS = '1'
949                if c.interface.name == 'realShort':
950                        NUMBER_OF_VECTORS = '1'
951                if c.interface.name == 'complexDouble':
952                        NUMBER_OF_VECTORS = '2'
953                if c.interface.name == 'complexFloat':
954                        NUMBER_OF_VECTORS = '2'
955                if c.interface.name == 'complexShort':
956                        NUMBER_OF_VECTORS = '2'
957                for individual_port in comp.ports:
958                        if individual_port.type == "Uses":
959                                if individual_port.interface.name == 'timingStatus':
960                                        ts = " "*12 + "if (" + comp.name.lower() + "->outPort" + str(portCount) + '_active) {\n'; output.write(ts)
961                                        ts = " "*16 + comp.name.lower() + "->outPort" + str(portCount) + '_servant->send_timing_message(' + comp.name.lower() + '->naming_service_name, "' + c.name + '", "pushPacket", "begin", mb->length()/(sizeof('+ DATA_TYPE_BEING_USED +')*'+ NUMBER_OF_VECTORS +'));\n'; output.write(ts)
962                                        ts = " "*12 + '}\n'; output.write(ts)
963                                portCount += 1
964                ts = " "*12 + 'unsigned int buffer_size=mb->length();\n'; output.write(ts)
965                ts = " "*12 + 'unsigned int packet_size=buffer_size/(sizeof(' + DATA_TYPE_BEING_USED + ')*' + NUMBER_OF_VECTORS + ');\n'; output.write(ts)
966                ts = " "*12 + 'vals.resize(packet_size*' + NUMBER_OF_VECTORS + ');\n'; output.write(ts)
967                if c.interface.name == 'realDouble':
968                        ts = " "*12 + 'I.length(packet_size);\n'; output.write(ts)
969                if c.interface.name == 'realFloat':
970                        ts = " "*12 + 'I.length(packet_size);\n'; output.write(ts)
971                if c.interface.name == 'realShort':
972                        ts = " "*12 + 'I.length(packet_size);\n'; output.write(ts)
973                if c.interface.name == 'complexDouble':
974                        ts = " "*12 + 'I.length(packet_size);\n'+" "*12 + 'Q.length(packet_size);\n'; output.write(ts)
975                if c.interface.name == 'complexFloat':
976                        ts = " "*12 + 'I.length(packet_size);\n'+" "*12 + 'Q.length(packet_size);\n'; output.write(ts)
977                if c.interface.name == 'complexShort':
978                        ts = " "*12 + 'I.length(packet_size);\n'+" "*12 + 'Q.length(packet_size);\n'; output.write(ts)
979                ts = " "*12 + 'ACE_OS::memmove( (char*)&vals[0], mb->rd_ptr(), buffer_size);\n'; output.write(ts)
980                ts = " "*12 + 'for (unsigned int i=0; i<packet_size; i++) {\n'; output.write(ts)
981                if c.interface.name == 'realDouble':
982                        ts = " "*16 + 'I[i]=vals[i];\n'; output.write(ts)
983                if c.interface.name == 'realFloat':
984                        ts = " "*16 + 'I[i]=vals[i];\n'; output.write(ts)
985                if c.interface.name == 'realShort':
986                        ts = " "*16 + 'I[i]=vals[i];\n'; output.write(ts)
987                if c.interface.name == 'complexDouble':
988                        ts = " "*16 + 'I[i]=vals[i];\n'; output.write(ts)
989                        ts = " "*16 + 'Q[i]=vals[i+packet_size];\n'; output.write(ts)
990                if c.interface.name == 'complexFloat':
991                        ts = " "*16 + 'I[i]=vals[i];\n'; output.write(ts)
992                        ts = " "*16 + 'Q[i]=vals[i+packet_size];\n'; output.write(ts)
993                if c.interface.name == 'complexShort':
994                        ts = " "*16 + 'I[i]=vals[i];\n'; output.write(ts)
995                        ts = " "*16 + 'Q[i]=vals[i+packet_size];\n'; output.write(ts)
996                ts = " "*12 + '}\n'; output.write(ts)
997                ts = " "*12 + 'for (unsigned int i = 0; i < outPorts.size(); i++) {\n'; output.write(ts)
998                ts = " "*16 + 'outPorts[i].port_var->pushPacket( ' + ARGUMENT_LIST_FOR_PUSH + ' );\n'; output.write(ts)
999                ts = " "*12 + '}\n'; output.write(ts)
1000                portCount = 0
1001                for individual_port in comp.ports:
1002                        if individual_port.type == "Uses":
1003                                if individual_port.interface.name == 'timingStatus':
1004                                        ts = " "*12 + "if (" + comp.name.lower() + "->outPort" + str(portCount) + '_active) {\n'; output.write(ts)
1005                                        ts = " "*16 + comp.name.lower() + "->outPort" + str(portCount) + '_servant->send_timing_message(' + comp.name.lower() + '->naming_service_name, "' + c.name + '", "pushPacket", "end", mb->length()/(sizeof('+ DATA_TYPE_BEING_USED +')*'+ NUMBER_OF_VECTORS +'));\n'; output.write(ts)
1006                                        ts = " "*12 + '}\n'; output.write(ts)
1007                                portCount += 1
1008                ts = " "*12 + 'mb->release();\n'; output.write(ts)
1009                ts = " "*8 + '}\n'; output.write(ts)
1010                ts = " "*4 + '}\n' + " "*4 + 'return 0;\n}\n'
1011                output.write(ts)
1012        else:
1013                if timing_flag & (c.interface.name=='timingStatus'):
1014                        ts = " "*4 + 'dataOut_timingStatus_i *output_port = this;\n'; output.write(ts)
1015                        ts = " "*4 + 'int message_buffer_read_idx = 0;\n'; output.write(ts)
1016                        ts = " "*4 + '\n'; output.write(ts)
1017                        ts = " "*4 + 'while(1) {\n'; output.write(ts)
1018                        ts = " "*8 + 'output_port->data_is_ready->wait();\n'; output.write(ts)
1019                        ts = " "*8 + 'for (unsigned int i = 0; i < output_port->outPorts.size(); i++) {\n'; output.write(ts)
1020                        ts = " "*12 + 'output_port->outPorts[i].port_var->send_timing_event(output_port->message_buffer[message_buffer_read_idx].component_name,\n'; output.write(ts)
1021                        ts = " "*16 + 'output_port->message_buffer[message_buffer_read_idx].port_name,\n'; output.write(ts)
1022                        ts = " "*16 + 'output_port->message_buffer[message_buffer_read_idx].function_name,\n'; output.write(ts)
1023                        ts = " "*16 + 'output_port->message_buffer[message_buffer_read_idx].description,\n'; output.write(ts)
1024                        ts = " "*16 + 'output_port->message_buffer[message_buffer_read_idx].time_s,\n'; output.write(ts)
1025                        ts = " "*16 + 'output_port->message_buffer[message_buffer_read_idx].time_us,\n'; output.write(ts)
1026                        ts = " "*16 + 'output_port->message_buffer[message_buffer_read_idx].number_samples);\n'; output.write(ts)
1027                        ts = " "*8 + '}\n'; output.write(ts)
1028                        ts = " "*8 + 'message_buffer_read_idx++;\n'; output.write(ts)
1029                        ts = " "*8 + 'message_buffer_read_idx = message_buffer_read_idx%NUMBER_TIMING_MESSAGE_BUFFER;\n'; output.write(ts)
1030                        ts = " "*4 + '}\n'; output.write(ts)
1031                        ts = " "*4 + 'return 0;\n'; output.write(ts)
1032                        ts = '}\n'; output.write(ts)
1033                else:
1034                        ts = " "*4 + 'return 0;\n' + '}\n'; output.write(ts)
1035   
1036  def writeTimingMessageDef(self, output,c,type):
1037    if type == 'port':
1038        ts = 'void ' + c.u_cname + '::send_timing_message(string component_name, string port_name, string function_name, string description, long number_samples) {\n'; output.write(ts)
1039        ts = " "*4 + 'writing_to_timing_buffer.lock();\n'; output.write(ts)
1040        ts = " "*4 + 'struct timeval tv;\n'; output.write(ts)
1041        ts = " "*4 + 'struct timezone tz;\n'; output.write(ts)
1042        ts = " "*4 + 'gettimeofday(&tv, &tz);\n'; output.write(ts)
1043        ts = " "*4 + 'strcpy(message_buffer[message_buffer_write_idx].component_name, component_name.c_str());\n'; output.write(ts)
1044        ts = " "*4 + 'strcpy(message_buffer[message_buffer_write_idx].port_name, port_name.c_str());\n'; output.write(ts)
1045        ts = " "*4 + 'strcpy(message_buffer[message_buffer_write_idx].function_name, function_name.c_str());\n'; output.write(ts)
1046        ts = " "*4 + 'strcpy(message_buffer[message_buffer_write_idx].description, description.c_str());\n'; output.write(ts)
1047        ts = " "*4 + 'message_buffer[message_buffer_write_idx].time_s = tv.tv_sec;\n'; output.write(ts)
1048        ts = " "*4 + 'message_buffer[message_buffer_write_idx].time_us = tv.tv_usec;\n'; output.write(ts)
1049        ts = " "*4 + 'message_buffer[message_buffer_write_idx].number_samples = number_samples;\n'; output.write(ts)
1050        ts = " "*4 + 'message_buffer_write_idx++;\n'; output.write(ts)
1051        ts = " "*4 + 'message_buffer_write_idx = message_buffer_write_idx%NUMBER_TIMING_MESSAGE_BUFFER;\n'; output.write(ts)
1052        ts = " "*4 + 'writing_to_timing_buffer.unlock();\n'; output.write(ts)
1053        ts = " "*4 + 'data_is_ready->post();\n'; output.write(ts)
1054        ts = '}\n'; output.write(ts)
1055
1056  def writeOperation(self,output,i,prefix='',cppFlag=False,in_name='',using_ace=False,comp='',port=''):
1057    """ Writes the declaration or definition of an operation (pushPacket) to
1058        the port_impl.h and port_impl.cpp files respectively """
1059    ocount = 0
1060    for o in i.operations:
1061       
1062
1063        ocount += 1
1064        if cppFlag:
1065            if ocount > 1:
1066                ts = "\n" + o.returnType + ' ' + prefix + o.name + '('
1067                tscxx = "\n" + o.cxxReturnType + ' ' + prefix + o.name + '('
1068            else:
1069                ts = o.returnType + ' ' + prefix + o.name + '('
1070                tscxx = o.cxxReturnType + ' ' + prefix + o.name + '('
1071        else:
1072            ts = prefix + " "*4 + o.returnType + ' ' + o.name + '('
1073            tscxx = prefix + " "*4 + o.cxxReturnType + ' ' + o.name + '('
1074       
1075        first = True
1076        for p in o.params:
1077            _USE_AMPERSAND_ = ''
1078            _USE_CONST_ = 'const '
1079            _USE__OUT_ = ''
1080            if p.direction == 'out':
1081                if len(p.dataType) > 8 and p.dataType[-8:] != 'Sequence':
1082                    _USE_CONST_ = ''
1083                    _USE_AMPERSAND_ = '&'
1084                if len(p.dataType) <= 8:
1085                    _USE_CONST_ = ''
1086                    _USE_AMPERSAND_ = '&'
1087            if p.direction == 'in' and len(p.dataType) > 8 and p.dataType[-8:] == 'Sequence':
1088                _USE_AMPERSAND_ = '&'
1089            if p.direction == 'inout' and len(p.dataType) > 8 and p.dataType[-8:] == 'Sequence':
1090                _USE_CONST_ = ''
1091                _USE_AMPERSAND_ = '&'
1092            if p.direction == 'out' and len(p.dataType) > 8 and p.dataType[-8:] == 'Sequence':
1093                _USE__OUT_ = '_out'
1094
1095            if not first:
1096                ts += ','
1097                tscxx += ','
1098            else:
1099                first = False
1100            ts += _USE_CONST_ + p.dataType + _USE__OUT_ + ' ' + _USE_AMPERSAND_ + p.name
1101            tscxx += p.cxxType + ' ' + p.name
1102        #if len(o.params) != 0:
1103        if cppFlag:
1104            ts += ')\n'
1105            tscxx += ')\n'
1106        else:
1107            ts += ');\n'
1108            tscxx += ');\n'
1109#        output.write(ts)
1110        output.write(tscxx)
1111       
1112        if cppFlag:
1113                #ts = "{\n" + " "*4 + "unsigned int len = " + "hello" + ".length();\n"; output.write(ts)
1114                #ts = "{\n\n" + " "*4 + "/* Data flow and processing goes here */\n\n"; output.write(ts)
1115                if using_ace:
1116                        if len(o.params)>0:
1117                                if _USE__OUT_ == '' :
1118                                        if ((o.params[0].dataType == 'PortTypes::DoubleSequence')|(o.params[0].dataType == 'PortTypes::FloatSequence')|(o.params[0].dataType == 'PortTypes::ShortSequence')):
1119                                                portCount = 0
1120                                                ts = "{\n"; output.write(ts)
1121                                                for individual_port in comp.ports:
1122                                                        if individual_port.type == "Uses":
1123                                                                if individual_port.interface.name == 'timingStatus':
1124                                                                        ts = " "*4 + "if (" + comp.name.lower() + "->outPort" + str(portCount) + '_active) {\n'; output.write(ts)
1125                                                                        ts = " "*8 + comp.name.lower() + "->outPort" + str(portCount) + '_servant->send_timing_message(' + comp.name.lower() + '->naming_service_name, "' + port.name + '", "' + o.name + '", "begin", I.length());\n'; output.write(ts)
1126                                                                        ts = " "*4 + '}\n'; output.write(ts)
1127                                                                portCount += 1
1128                                                ts = " "*4 + "unsigned int len = " + o.params[0].name + ".length();\n"; output.write(ts)
1129                                                if o.params[0].dataType == 'PortTypes::DoubleSequence':
1130                                                        TYPE_NAME = 'double';
1131                                                if o.params[0].dataType == 'PortTypes::FloatSequence':
1132                                                        TYPE_NAME = 'float';
1133                                                if o.params[0].dataType == 'PortTypes::ShortSequence':
1134                                                        TYPE_NAME = 'short';
1135                                                if len(o.params) == 1:
1136                                                        NUMBER_VECS = '1'
1137                                                        if o.params[0].dataType == 'PortTypes::DoubleSequence':
1138                                                                DATA_TYPE = '4';
1139                                                        if o.params[0].dataType == 'PortTypes::FloatSequence':
1140                                                                DATA_TYPE = '5';
1141                                                        if o.params[0].dataType == 'PortTypes::ShortSequence':
1142                                                                DATA_TYPE = '6';
1143                                                if len(o.params) == 2:
1144                                                        NUMBER_VECS = '2'
1145                                                        if o.params[0].dataType == 'PortTypes::DoubleSequence':
1146                                                                DATA_TYPE = '1';
1147                                                        if o.params[0].dataType == 'PortTypes::FloatSequence':
1148                                                                DATA_TYPE = '2';
1149                                                        if o.params[0].dataType == 'PortTypes::ShortSequence':
1150                                                                DATA_TYPE = '3';
1151                                                ts = " "*4 + "vector <" + TYPE_NAME + "> data_in(len*" + NUMBER_VECS + ");\n"; output.write(ts)
1152                                                ts = " "*4 + "char *buffer;\n"; output.write(ts)
1153                                                ts = " "*4 + "buffer = new char[len*" + NUMBER_VECS + "*sizeof(" + TYPE_NAME + ")+sizeof(unsigned short)];\n\n"; output.write(ts)
1154                                                ts = " "*4 + "for (unsigned int i = 0; i<len; i++) {\n"; output.write(ts)
1155                                                if len(o.params) == 1:
1156                                                        ts = " "*8 + "data_in[i] = " + o.params[0].name + "[i];\n"; output.write(ts)
1157                                                if len(o.params) == 2:
1158                                                        ts = " "*8 + "data_in[i] = " + o.params[0].name + "[i];\n"; output.write(ts)
1159                                                        ts = " "*8 + "data_in[i+len] = " + o.params[1].name + "[i];\n"; output.write(ts)
1160                                                ts = " "*4 + "}\n"; output.write(ts)
1161                                                ts = " "*4 + "unsigned short data_type = " + DATA_TYPE + ";\n"; output.write(ts)
1162                                                ts = " "*4 + "memcpy(buffer, &data_type, sizeof(unsigned short));\n"; output.write(ts)
1163                                                ts = " "*4 + "memcpy(&buffer[sizeof(unsigned short)], (char *)&data_in[0], len*" + NUMBER_VECS + "*sizeof(" + TYPE_NAME + ")+sizeof(unsigned short));\n"; output.write(ts)
1164                                                ts = "\n" + " "*4 + "ACE_Message_Block *message = new ACE_Message_Block (len*" + NUMBER_VECS + "*sizeof(" + TYPE_NAME + ")+sizeof(unsigned short));\n"; output.write(ts)
1165                                                ts = " "*4 + "message->copy((const char*)&buffer[0], len*" + NUMBER_VECS + "*sizeof(" + TYPE_NAME + ")+sizeof(unsigned short));\n"; output.write(ts)
1166                                                ts = " "*4 + "size_t message_length = len*" + NUMBER_VECS + "*sizeof(" + TYPE_NAME + ")+sizeof(unsigned short);\n"; output.write(ts)
1167                                                ts = " "*4 + "size_t available_space = " + in_name + "->msg_queue()->message_bytes();\n"; output.write(ts)
1168                                                ts = " "*4 + "if (available_space<=(" + in_name + "->queue_size+message_length)) {\n"; output.write(ts)
1169                                                ts = " "*8 + "" + in_name + "->queue_size+=QUEUE_BLOCK_SIZE;\n"; output.write(ts)
1170                                                ts = " "*8 + "" + in_name + "->water_marks (ACE_IO_Cntl_Msg::SET_HWM," + in_name + "->queue_size);\n"; output.write(ts)
1171                                                ts = " "*4 + "}\n"; output.write(ts)
1172                                                ts = " "*4 + "if (" + in_name + "->putq(message) == -1) {\n"; output.write(ts)
1173                                                ts = " "*8 + "// this is where there would be a message about the putq failing\n"; output.write(ts)
1174                                                ts = " "*4 + "}\n"; output.write(ts)
1175                                                portCount = 0
1176                                                for individual_port in comp.ports:
1177                                                        if individual_port.type == "Uses":
1178                                                                if individual_port.interface.name == 'timingStatus':
1179                                                                        ts = " "*4 + "if (" + comp.name.lower() + "->outPort" + str(portCount) + '_active) {\n'; output.write(ts)
1180                                                                        ts = " "*8 + comp.name.lower() + "->outPort" + str(portCount) + '_servant->send_timing_message(' + comp.name.lower() + '->naming_service_name, "' + port.name + '", "' + o.name + '", "end", I.length());\n'; output.write(ts)
1181                                                                        ts = " "*4 + '}\n'; output.write(ts)
1182                                                                portCount += 1
1183                                                ts = " "*4 + "\ndelete buffer;\n}\n"; output.write(ts)
1184                                                #ts += " "*4 + "/* if using ACE:\n\n" + " "*7
1185                                                #ts += "ACE_Message_Block *mb;\n" + " "*7 + "putq(mb);\n"
1186                                                #ts += " "*4 + "*/\n\n}\n"
1187                                                #output.write(ts)
1188                                        else:
1189                                                ts = "{\n\n}\n"; output.write(ts)
1190                                else:
1191                                        ts = "{\n\n}\n"; output.write(ts)
1192                        else:
1193                                ts = "{\n\n}\n"; output.write(ts)
1194                else:
1195                        ts = "{\n\n}\n"; output.write(ts)
1196       
1197  def writeFriendDecl(self,output,c):
1198      friendList = []
1199      for p in c.ports:
1200          if p.type == "Uses":
1201              if p.u_cname not in friendList:
1202                  friendList.append(p.u_cname)
1203          if p.type == "Provides":
1204              if p.p_cname not in friendList:
1205                  friendList.append(p.p_cname)
1206                 
1207      for x in friendList:
1208          ts = " "*4 + "friend class " + x + ";\n"
1209          output.write(ts)
1210     
1211
1212  def addGPL(self,outFile,name):
1213      inFile = open('generate/gpl_preamble','r')
1214      for line in inFile.readlines():
1215          l_out = line.replace("__COMP_NAME__",name)
1216          outFile.write(l_out)
1217       
1218      inFile.close()
1219         
1220       
1221  def cleanUp(self):
1222      # Move the AssemblyController to the waveform Dir
1223      for c in self.active_wave.components:
1224        if c.AssemblyController == True and c.generate:
1225            os.system('mv ' + self.path + c.name + ' ' + self.path + self.active_wave.name)
1226
1227       
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