Changeset 8226
- Timestamp:
- 08/28/08 14:23:10 (5 years ago)
- Files:
-
- 1 modified
Legend:
- Unmodified
- Added
- Removed
-
ossiedev/branches/mcarrick/VHDL/full_adder_pg/full_adder_pg.vhd
r8215 r8226 1 -- FullAdder with Propogate and Generate Functions1 -- Adder with Propogate and Generate Functions 2 2 -- 3 -- This component is an implementation of a full adder4 -- with the propagate and generate functions to be5 -- used in a carry look ahead adder.6 -- 7 -- This component requires the full_adder component.3 -- This component is slightly different from a 4 -- real full adder which computes both the sum 5 -- and the carry out. This computes only the sum 6 -- and the propagate and generate functions for 7 -- use in a carry look ahead adder. 8 8 9 9 library ieee; … … 22 22 architecture full_adder_pg_behav of full_adder_pg is 23 23 24 -- full adder to be instantiated25 component full_adder is26 port ( a : in std_logic;27 b : in std_logic;28 cIn : in std_logic;29 s : out std_logic;30 cOut : out std_logic31 );32 end component full_adder;33 34 24 begin 35 25 36 -- use sum and carry out function defined 37 -- in the full adder 38 full_adder_inst : full_adder 39 port map ( a => a, 40 b => b, 41 cIn => cIn, 42 s => s, 43 cOut => open 44 ); 26 -- only calculate sum 27 s <= (a xor b) xor cIn; 45 28 46 29 -- calculate the propagate and generate functions … … 52 35 53 36 54
